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In this paper, an energy harvesting CMOS image sensor with ultra-low power consumption is presented. The proposed active pixel sensor (APS) operates in current-mode and a 9-bit flash series current-mode A/D converter unit together with its peripheral control circuitry are all integrated on chip. A power consumption as low as 84pW/frame per pixel is achieved by biasing the in-pixel transconductance...
In this paper, we propose a low voltage, low power, reconfigurable resolution CMOS image sensor with energy harvesting capability for wireless image sensor networks. Logarithmic type pixel is adopted to provide a wide dynamic range for image capturing. Semi-pixel level single slope analog-to-digital conversion is realized by employing in-pixel transistors as a part of the column comparator. A correlated...
In this paper, a 32×32-bit low power multi-precision multiplier is described, in which each building block can be either an independent smaller-precision multiplier or work in parallel to perform higher-precision operations. The proposed multi-precision multiplier enables voltage and frequency scaling for low power operation, while still maintaining full throughput. According to user's arbitrary throughput...
A novel CMOS current-mediated imager (CMI) is presented with high output linearity. In the proposed structure, the pixel operates in triode region, instead of operating in saturation region for conventional current-mediated imagers. As a consequence, the output current is a linear function of the photocurrent at the sensing node. Such a linear feature reduces the DC current consumption by more than...
Low-power design is essential for computation-intensive systems such as digital signal processors (DSP) as well as battery-powered devices. This paper presents a novel low-power multiplier architecture, which exploits the effective dynamic range of the input data and performs a run-time multi-precision multiplication. Block-wise shutdown and voltage scaling techniques are combined to disable unused...
In this paper, a low power CMOS image sensor using DPS scheme is proposed. A sub-threshold control unit is used in order to enable or disable the pixel level ADC depending on the photodiode sensing voltage, hence enabling to save the static power needed to operate the pixel level ADC. Results show that up to 90% power saving is achieved when compared with the conventional digital pixel sensor. To...
In this paper, a reconflgurable multi-precision Radix-4 Booth multiplier structure is presented. The reconfig- urable 8 x 8 bit multiplier unit can be cascaded to form a multiplier that can adapt to variable input precision requirements. The number of bits can be extended by concatenating more stages together. For example, four 8 x8 bit units can be used to build a 16 x 16 bit Booth multiplier. In...
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