The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
New electrostatic discharge (ESD) clamp devices for using in power-rail ESD clamp circuits with the substrate-triggered technique are proposed to improve ESD level in a limited silicon area. The parasitic n-p-n and p-n-p bipolar junction transistors (BJTs) in the CMOS devices are used to form the substrate-triggered devices for ESD protection. Four substrate-triggered devices are proposed and investigated...
The lateral SCR devices used in CMOS on-chip ESD protection circuits are reviewed. Such SCR devices had been found to be accidentally triggered by noise pulses when the ICs are operated in the application systems. A cascoded design is therefore proposed to safely apply the LVTSCR devices for whole-chip ESD protection in CMOS ICs without causing unexpected operation errors or latchup danger. The temperature...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.