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This paper presents a coverage-driven constraint random-based functional verification (CCRFV) method of pipeline unit in a microprocessor. The environment of verification, which is created by means of verification methodology manual (VMM) for SystemVerilog, is reusable and can reduce verification time. The model created by combining classification trees, which can ensure to cover complete coverage...
This paper presents a coverage-driven Constraint random-based functional verification method of memory controller in a microprocessor. Many special functions are integrated into this memory controller for anti-radiating, so it is more difficult to verify . This system of verification, which is creating by means of verification methodology manual (VMM) for systemverilog and classification trees, is...
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