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Multi-threshold CMOS(MTCMOS) has been developed as one of the most efficient techniques to reduce leakage power. However, sleep transistor insertion might impose problems on power supply network design. We studied IR-drop variance by sleep transistor insertion at the full-chip level. Our work covered different modes, structures and tapping patterns. We identified in most cases the varied current distribution...
The multi-threshold-voltage CMOS (MTCMOS) technique is very effective for reducing leakage power. Previously, sleep transistors were connected the virtual ground lines to reduce the power consumption, and a distributed sleep transistor network (DSTN) was proposed to reduce the instantaneous current. This paper presents a research on how to find the near optimal solution for the sleep transistor sizing...
The optimization of virtual supply network plays an important role in MTCMOS low power design. Existing low power works are mainly on gate-level without any optimization on physical design level, which can lead to large amount of virtual supply networks. This paper presents (1) a low power driven physical design flow; (2) a novel low power placement to simultaneously place standard cells and sleep...
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