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A new CMOS buffer circuit for high capacitive loads is presented. The objective of the design is a high-power, area-efficient buffer to be used in very large scale analogue applications. The buffer can deliver a slew rate of 1.2 V/ mu s to capacitive loads in excess of 5000 pF. It has a total harmonic distortion of less than 3% at 20 kHz. At stand by, it consumes only 125 mu A (0.625 mW). The buffer...
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