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This paper presents the design of a wide-band digital frequency synthesizer for cognitive radio sensor units. It is based on an all-digital phase-locked loop, and employs a digitally controlled ring oscillator with an LC tank introduced to extend tuning range and reduce power dissipation. Adaptive frequency calibration based on binary search is used for fast frequency settling. Fabricated in a 65-nm...
This paper presents a 2.4-GHz all-digital phaselocked loop (ADPLL) frequency synthesizer for wireless applications. The ADPLL is built around a digitally controlled LC oscillator, and it covers the target frequency range with fine frequency resolution. In the feedback path, a high-speed topology is employed for the variable phase accumulator to count full cycles of the RF output. A simple technique...
This paper describes an implementation of a frequency synthesizer for cognitive ratio application. The frequency synthesizer is based on all-digital phase locked loop, and employs adaptive frequency calibration for fast settling. Wide tuning range is achieved by using a ring oscillator with a band-extension technique. The frequency synthesizer is fabricated in a 65-nm CMOS process. It occupies an...
This paper proposes a technique to speed up the start-up process of frequency synthesizers for wireless sensor network (WSN) applications. The proposed technique relies on an all-digital phase-locked loop (ADPLL) architecture to preserve last known settled synthesizer state over an extended power-down period and use it on next power-up. The effect of periodic variations such as a change in die temperature...
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