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Over the past few decades, CMOS technology has mainly been driven by transistor scaling. However, the scaling benefits of conventional bulk MOSFETs come at the cost of increased short channel effects, degrading their performance as a switch. In order to counter such effects, device structures with enhanced gate control of the channel have been proposed. A double-gate (DG) MOSFET is one such structure...
This article proposes a device optimization technique to achieve high performance in double-gate MOSFETs by considering the trade-off between on-current and gate capacitance with silicon thickness. It shows that the optimal silicon thickness varies based on the mode of operation (super-threshold or sub-threshold). Even though these devices have intrinsic body thickness variations, the effect of these...
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