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Multi-Core architecture is the development trend of microprocessor architecture, and the “Memory Wall” is the chief obstacle to promote the processor performance. This paper analyzes the key factors affecting performance of memory system in shared L2 cache multi-core on a chip architecture, and believes that cache pollution caused by the speculative execution of memory reference instructions in predictive...
Correct and effective instruction pre-fetch strategy is key technique to avoid instruction misses. Unfortunately, branch direction correctness and the accuracy of instruction pre-fetch is not very good, and the utilization ratio of memory bandwidth is relative low, all of these mentioned reasons are the main factors leading to instruction miss. This paper proposes an adaptive and selective instruction...
Modular multiplication is the core operation of ECC (Elliptic Curve Cryptosystems). Based on the Montgomery multiplication algorithm, a scalable and unified modular multiplier is proposed which can work with any precision of the operands and work in both prime and binary finite fields at the same time. It is captured in Verilog and synthesized under 0.18 mum CMOS technology. The result indicates that...
The key technique for the design of a frequency divider is to find a function between the input and output. In general, the design process and circuit of a frequency divider is complicated, modification and transplantation for it is difficult. A creative design method of CAIFD (Controllable Arbitrary Integer Frequency Divider) is presented in this paper, which uses the VHDL (VHSIC Hardware Description...
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