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A 460 kS/s 10-bit successive approximation register (SAR) analog-to-digital converter (ADC) with rail-to-rail input range is proposed for acquiring capacitive sensor. The specifications of ADC are optimized at system level, emphasizing the ADC following a switched-capacitor (SC) capacitance-to-voltage converter (C2V). A bootstrap switch with body effect reduction is adopted to provide the rail-to-rail...
This paper proposes a new way to compensate comparator errors in successive approximation analog-to-digital convertor (SAR ADC). The method adds negatively biased capacitance to traditional binary-scaled compensation, increasing ADC accuracy by up to 20%. A novel digital-to-analog convertor (DAC) structure is introduced to further increase its efficiency, which reduces total capacitance by 80%. According...
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