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A fully CMOS transmitter including a power amplifier (PA) using a Cartesian Feedback (CFB) technique is presented. This system aims at improving the linearity of the transmitter, designed in 65nm CMOS technology from STMicroelectronics, essentially the power amplifier linearity. This transmitter delivers a maximum output power of 23dBm. Thanks to this linearization technique, the ACPR has been improved...
Nowadays, mobile handsets have to deal with several challenges. First of all, a good efficiency is essential in order to save power and battery life-time. Then, to cater to multi-standards operation which provide very high data rates, strong linearity performances are mandatory, to the expense of transmit front-end efficiency. As RF Power Amplifiers (PAs) are the most power consuming components, this...
This paper presents a 65 nm CMOS power amplifier (PA) using a coupled transformer. The PA is based on an original structure, called stacked folded fully differential structure (SFFDS). It is applied to the UMTS W-CDMA standard. The parallel SFFDS power amplifier provides 30.5 dBm of output power with 20% of power added efficiency (PAE) at 1.95 GHz. The output compression point (OCP1) is 27.5 dBm and...
The following discussion presents a novel technique of power management in TX 4G transmit path, capable of efficiently handling wide channel bandwidth and high peak-to-average-power-ratio (PAPR). It consists in a power adaptive closed loop, based on a switched multi-cell power amplifier (PA) core and a novel delta-sigma control loop topology. This work was carried out with a ST microelectronics SiGe...
This paper presents a 65 nm CMOS-power amplifier (PA) designed for mobile communications.The PA is based on a new structure, the stacked folded fully differential (SFFD) which is inspired by a push-pull structure. The PA is designed for the UMTS W-CDMA standard which requires linearity from -20 dBm to 24 dBm output power. The power amplifier provides 31 dBm output power with 26% of power added efficiency...
A 24 GHz, +18.0 dBm fully-integrated power amplifier (PA) with 50 Omega input and output matching is designed in 0.13 mum SiGe BiCMOS process. The power amplifier features a peak power gain of 7.8 dB with 15.89 dBm output power at 1 dB compression and a maximum single-ended output power of +18.0 dBm with 25.9% of power-added efficiency (PAE). The power amplifier uses a single 1.8 V supply and was...
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