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The performance of p-type silicon nanowire FETs with three different silicon-germanium cladding options is bench-marked against the silicon reference device. Low-field mobilities and full device characteristics are obtained from the solution of the subband Boltzmann transport equation, including phonon and surface roughness scattering. The subband dispersion is calculated using 6kp band structure...
In this letter, we show an improvement not only in performance but also in reliability of a 30-nm-thick biaxially strained SiGe (20% Ge) channel on Si p-type metal-oxide semiconductor field-effect transistors. Compared with a Si chan nel, a strained SiGe channel allows larger hole mobility μh in the transport direction and alleviates charge flow toward the gate oxide. μh enhancement...
We report a comprehensive study of surface orientation, channel direction, and uniaxial strain technologies for SiGe channels CMOS. On a (110) surface, SiGe nMOS demonstrates a higher electron mobility than Si (110) nMOS. The hole mobility of SiGe pMOS is greater on a (110) surface than on a (100) surface. Both electron and hole mobility on SiGe (110) surfaces are further enhanced in a <;110>...
A comprehensive materials set has been fabricated and characterized to address the challenging issues in both gate first and gate last HK/MG CMOS. Specifically, metal gate thermal budget and channel composition are shown to be effective methods to engineer pMetal effective work function for gate last and gate first, respectively. Low temperature processing has resulted in low nMOS Vfb and high pMOS...
We report the results of a systematic study to understand low drive current of Ge-based nMOSFET. The poor electron transport property is primarily attributed to the intrinsically low density of state and high conductivity effective masses. Results are supported by interface trap density (Dit) and specific contact resistivity (rhoc), which are comparable (or symmetric) for both n- and p-MOSFETs. Effective...
We have studied key parameters for controlling threshold voltage (Vth) variation and strain maintenance of gate first SiGe channel pMOSFETs. By overcoming 1) Ge diffusion and 2) strain relaxation during source/drain activation, we for the first time demonstrate high Ge% (50%) SiGe channel with millisecond flash anneal. Optimizing the thermal budget with millisecond anneal keeps the Vth variation same...
For the first time, we provide mechanistic understanding of high gate leakage current on surface channel SiGe pFET with high-k/metal gate to enable sub 1 nm EOT. The primary mechanism limiting EOT scaling is Ge enhanced Si oxidation resulting in a thick (1.4 nm) SiOx interface layer. A secondary mechanism, Ge doping (ges4%) in high-k, possibly by up diffusion, also results in higher leakage. With...
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