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Neuromorphic computing mimicking the functionalities of mammalian brain holds the promise for cognitive capabilities enabling new intelligent applications. However, research efforts so far mainly focused on using analog and digital CMOS technologies to emulate neural activities, and are yet to achieve expected benefits. They suffer from limited scalability, density overhead, interconnection bottleneck...
Maintaining power scaling trend and cell stability are critical challenges facing CMOS SRAM at sub-20nm technologies. These challenges primarily stem from the fundamental limitations of MOSFETs, and the rigid device doping and sizing requirements of underlying SRAM design. In this paper, we propose a new volatile memory architecture called Tunnel FET based Random Access Memory (TNRAM) that solves...
Spin Wave Functions (SPWFs) realize computation with spin waves, offering several benefits and new features over CMOS. SPWF technology potentially opens up new directions for designing microprocessors with increased capabilities over current implementations. Towards this end, as a preliminary work an 8-bit embedded processor is explored here using SPWFs and evaluated in terms of its power, area and...
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