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This paper discusses the active and reactive power control method for a modular multilevel converter (MMC) based grid-connected PV system. The voltage vector space analysis is performed by using average value models for the feasibility analysis of reactive power compensation (RPC). The proposed double-loop control strategy enables the PV system to handle unidirectional active power flow and bidirectional...
We present a high-resolution optical frequency domain reflectometry for characterization of group refractive index of waveguides in photonic integrated circuits. The method provides a relative accuracy of 10−4 for group refractive index measurements and of 10−3 for its dispersion.
A detailed conducted EMI prediction model of the three-stage starter/generator is proposed in this paper to analyze the EMI during the starting procedure. The main generator and exciter high-frequency (HF) models are represented by multistage LRC networks. The traditional low-frequency (LF) models in d-q reference and the corresponding control strategies are combined with the HF models through the...
This paper presents a compact bandpass filter based on stacked eighth-mode substrate integrated waveguide (EMSIW) resonators. By properly constructing the feeding and coupling topology of four EMSIW cavities, the proposed filter not only exhibits compact size, but also achieves enhanced selectivity by virtue of its three transmission zeros (TZs). A novel cross-coupled structure which contributes to...
When on-chip interconnection network scales to integrate more processing elements, the average end-to-end latency is highly increased due to long average hop distance. Though it has been discovered that, almost of the communication in large scale networks is between nodes in a short range, it revealed that the small portion of data delivery between distant nodes consumes or occupies most of the network...
Current hybrid network-on-chip designs in manycore systems are agnostic to the application requirements and thus are provided for general cases. This results in high cost in the manycore systems design, wasted energy and performance. We observe that the cost of network-on-chip designs can be reduced by optimizing the application-specific traffic onto the system. This paper presents mincostflow-based...
This paper is devoted to investigating the problems of the variable structure control and optimization for a class of time delay systems, which contain matched uncertainty and unmatched uncertainty, time-varying delay in state of system. Firstly, some special transformation is made for the considered system to obtain an equivalent system. A sliding surface is designed to ensure the behavior of system...
Data mining technology is used to analyze the association between driver's macroscopic characteristics and accident types of drivers of urban traffic accidents. Based on the correlation between microscopic characteristics (such as physiology and psychology of the driver and macro characteristics (such as sex, age and driving age), the statistic values of driver sex, age and driving characteristics...
Different applications require different communication performance between subnets in a global hybrid network-on-chip (NOC) of a heterogeneous CPU-GPU architecture (HSA). It is impractical to deploy (at design time) or switch-on (at runtime) all the hybrid routers in the network for a certain application that needs several hybrid routers for communication. Reconfiguring the customized global hybrid...
Influences of external factors on characteristic parameters of metal oxide arrester (MOA), such as temperature, humidity and chargeability, were studied in this paper. The results suggested that: with the increase of temperature, the equivalent impedance of MOA decreased exponentially, and the current characteristic parameters of MOA increased rapidly, while the DC reference voltage could be kept...
In the light of insulation breakdown events during commissioning process of UHV GIS equipment in recent years, effects on switching overvoltage when closing no-load GIS bus caused by the pre-breakdown of the circuit breaker was researched in this paper. The conclusions of this paper could be used as reference for the design of AC-UHV GIS equipment and insulation accident prevention.
To address power-thermal-dark silicon issues in many-core chip, run time task-resource and voltage co-allocation with reconfigurable network-on-chip (NoC) framework for energy and hotspots minimization is proposed in this work. At runtime, the global manager with the help of proposed MinEnergy mapping algorithm reconfigures the NoC links bandwidth and nodes voltage-level and power-gated the resources...
Hybrid Wireless Network-on-Chip (HWNoC) provides high bandwidth, low latency and flexible topology configurations, making this emerging technology a scalable communication fabric for future Many-Core System-on-Chips (MCSoCs). On the other hand, dark silicon is dominating the chip footage of upcoming MCSoCs since Dennard scaling fails due to the voltage scaling problem that results in higher power...
A typical 3D color digitization system is composed of 3D sensors to obtain 3D information, and color sensors to obtain color information. Sensor calibration plays a key role in determining the correctness and accuracy of the 3D color digitization data. In order to carry out the calibration quickly and accurately, this paper introduces an automated calibration process which utilizes 3D dynamic precision...
Aiming at the flexibility, mobility, scalability and other problems in current existing network architectures, this paper proposes a Reconfigurable Service-Centric Network(Re-SCNet) architecture to meet the needs of mass diverse customer service of the future network. Network function combination is one of the main directions to enhance the adaptability of the Internet. Re-SCNet mainly concentrates...
A new method for transient overvoltage (TOV) measurements in 500kV power system using capacitor voltage transformers (CVTs) is introduced in this paper. It is realized with a voltage sensor installed within the CVT as the low-voltage capacitor C3 connection in series with the high-voltage (HV) capacitor C1 and the median-voltage capacitor C2. Simulations studies and laboratory tests in manufactory...
Based on piecewise linear hypothesis that both the velocity and flow map gradient are constant in grid cell and adjacent time intervals, we design a time-slicing flow map preprocessing and composition based Finite-Time Lyapunov Exponent (FTLE) visualization algorithm for unsteady flow field. This algorithm is capable of reducing the computation overhead from duplicated flow map calculation and multiple...
With degradation in transistors dimensions and complication of circuits, Three-Dimensional Network-on-Chip (3-D NoC) is presented as a promising solution in electronic industry. By increasing the number of system components on a chip, the probability of failure will increase. Therefore, proposing fault tolerance mechanisms is an important target in emerging technologies. In this paper, two efficient...
Many-Core System-on-Chips (MCSoCs) require efficient task migration approach in order to reach system performance objectives such as load balancing, communication optimization, fault tolerance, and temperature control. In this paper an efficient self-aware migration approach is introduced for NoC-based MCSoCs using a centralized feedback controller in order to control the congestion over the system...
In order to ease the communication cost, application tasks are always distributed to nearby nodes in NoC-enabled SoCs, which result in concentrated area of traffic and power distribution. To utilize the intellectual properties on a single chip, and at the meantime, to reduce the high latency due to the long routing hops in large scale on-chip networks, hierarchy has been adopted to provide more attractive...
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