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In this work, we modified our wafer-scale 3D integration technique, originally developed for Si, to hybridize InP-based image sensor arrays with Si readout circuits. InGaAs image arrays based on the InGaAs layer grown on InP substrates were fabricated in the same processing line as silicon-on-insulator (SOI) readout circuits. The finished 150-mm-diameter InP wafer was then directly bonded to the SOI...
With the emergence of smart phones, the time is fast approaching when devices small enough to fit in a pocket will be able to meet all our personal computing and communication needs. Despite their increased capabilities and functionality, however, the size and shape of today's computing devices - from laptops to handhelds - are still largely determined by the same factors. But as user interfaces become...
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