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A mixed-mode adaptive duty-cycle corrector loop (DCC loop) architecture with background calibration method is proposed. The duty-cycle correction range is 20%–80% with maximum 5.9ps duty error at 8GHz. The entire blocks of the DCC loop consume 4.1mA from 0.95 V supply voltage at 5GHz frequency. Successful operations of duty-cycle correction loop for various PVT conditions are verified via intensive...
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