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A three-dimensional 16 stacked 1G cell/layer Pipe-shaped Bit-Cost Scalable (P-BiCS) flash memory test chip with 60nm technology has been developed. The effective 1-bit cell size is 0.00082 um2. This paper describes the branched control gate configuration and the new erase operation which are suitable for P-BiCS flash memory. P-BiCS flash memory is one of the most promising candidates for realizing...
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