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This work proposes an ADDLL/VDD-biasing co-design methodology for variation-tolerant designs. A modified ADDLL behaves as a variability sensor in the beginning of operation, and the sensing result is used by a VDD-biasing circuit to adjust the VDD of a loaded design for performance calibration. During normal operation, the ADDLL is reused as a de-skewing element for the calibrated design. With this...
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