The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Deformations of metal interconnects, cracks in interlayer dielectrics and passivation layers in combination with plastic-packaging are still a major reliability concern for integrated circuit power semiconductors. In order to describe and understand the failure mechanism and its root cause, already a lot of work has been done in the past. However for the first time the impact of the edge profile of...
Different flip chip bump configurations are investigated in terms of their electromigration behavior. Standard SAC (SnAgCu) solder bumps with a Ni/Au finish on the chip side are compared with Cu pillar bumps soldered with a thin layer of SnAg alloy. The substrate finish is identical for both cases and consists of a 17μm thick Cu layer. Depending on the current direction, different interfaces are stressed...
The reliability of Cu and W contacts under high fluence stress mimicking source/drain contacts in the on-state of a transistor is evaluated. We use Kelvin structures to study the contact degradation and to determine the lifetime as a function of voltage and temperature. Failure analysis reveals significant damage created in the proximity of the contacts. It is concluded that not electromigration alone,...
This paper presents a reliability model for wafer level chip scale packages (WLCSP) assembled with Sn4%Ag 0.5%Cu (SAC 405) solder. The reliability model is based on a creep constitutive model that takes into consideration the dimensions of the solder joints and a thermo-mechanical fatigue crack growth model. The creep constitutive model was derived from over 250 constant load creep tests performed...
The authors show for the first time that metal-crush failures can also be caused by mechanical impact which occurs during handling of the package and pick and place processes. So, not only thermo-mechanical effects might cause these failures. The paper also show a clear correlation between the observed failures on sample IC that returned from the field, and the failures observed on samples which were...
This study is aimed at analysing the reliability of a three-dimensional (3D) chip stacked package under cyclic thermal loading. The critical areas in the 3D chip stacked package are defined with finite element modeling (FEM) based simulations to correlate the thermal cycling experiments. The 3D chip stacked package consists of two 300mum thick Si chips vertically connected with Sn-Ag-Cu solder bump...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.