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NAND flash-based solid-state drives (SSDs), which can serve as the caches of hard disk drives, have gained popularity in large-scale, high-performance storage. A type of advanced error correction code for SSDs, low-density parity-check (LDPC), is required to mitigate a considerable number of errors in the raw data of NAND flash. However, LDPC imposes read performanceoverhead due to the complex decoding...
As technology continues to scale, reducing leakage is critical to achieve energy efficiency. Power gating can potentially save a significant part of leakage but it incurs both energy and performance penalties. Therefore, power gating decisions need to be made carefully. In the current low-power SoC design, an IP core is power gated when it is not operating. In this paper, we explore the IP idle time...
Optimizing memory system performance is critical for delivering high system performance for multimedia applications since they are usually memory intensive. As the number of IP cores in a multimedia MPSoC (Multi-Processor System-on-Chip) continues to increase, system performance will be eventually limited by the memory system. In this paper, we tackle the memory performance issue of multimedida MPSoCs...
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