The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A comparative investigation of the reliability of 60Coγ ray irradiation on bulk-Si substrate and SOI substrate double polysilicon self-aligned (DPSA) NPN bipolar transistors is presented. Bulk silicon based DPSA NPN transistors show severe current gain degradation at low injection level, and a monotonic increase in current gain degradation with decreasing Emitter-Base (E-B) voltage is observed. SOI...
A comparative investigation of γ-ray total dose ionization damage at high and low-level injection (HLI/LLI) for different dose rate irradiation in double polysilicon self-aligned bipolar NPN transistors is presented. The transistors reveal anomalous dose rate radiation responses for Emitter-Base (E-B) electrical field strength in forward active mode. This effect is probably associated with the different...
Post breakdown (BD) reliability is an important area of study in ultra-thin gate dielectrics as it has significant implications on the performance degradation, lifetime, reliability margin and power dissipation of advanced sub-22 nm transistors and circuits. A prolonged phase of post-BD can ensure we can live with the circuit with moderate performance and error-free operation, even if the soft breakdown...
The study of scanning tunneling microscopy (STM) induced localized degradation and polarity dependent breakdown (BD) of HfO2/SiOx dielectric stacks is presented in this work, together with a correlated investigation of the BD locations by transmission electron microscopy (TEM). The localized dielectric BD events are also analysed using conductive-atomic force microscopy. The analysis of the degradation...
The eSiGe layout effect induced by PC-bounded or STI-bounded eSiGe shows impact on device performance and variability increase. For PC-bounded device, performance degradation could be explained by the mobility loss due to reducing eSiGe volume and less stress strength. For STI-bounded device, performance degradation varies, due to strong interaction between eSiGe fill morphology and device overlap...
Mitigating the circuit aging effect in digital circuits has become a very important concern for current and future technology nodes. Negative Bias Temperature Instability (NBTI) is one of the most important circuit aging mechanisms, which can incur timing errors. Flip-flops play a vital role as storage elements in pipelined architectures and are prone to effects of aging. NBTI increases the transistor...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.