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A 10–20 Gb/s clock and data recovery (CDR) circuit with frequency tracking is presented. Two digital phase interpolators (PIs) are used to track the frequency of input data. The loop bandwidth of the CDR circuit is adaptively adjusted. A mixed-mode PI is used to generate the recovered clock. This CDR circuit is fabricated in a 40nm CMOS process and its area is 0.33×1.0 mm2. Its power consumption is...
A digital bang-bang phase-locked loop (BBPLL) with bandwidth calibration is presented. The proposed bandwidth calibration circuit adjusts the proportional and integral gain of the digital loop filter to tolerate the process, voltage and temperature (PVT) variations. This BBPLL is fabricated in 40-nm CMOS technology. Its active area is 0.0049 mm2 and the power is 3.34 mW from a supply of 1.1 V. The...
This paper utilized the improved particle swarm optimization (IPSO) technique for adjusting the gains of PID controller, Iterative Learning Control (ILC) and the bandwidth of zero-phase Butterworth filter of the ILC. The conventional ILC learning process has the potential to excite rich frequency contents and try to learn the error signals. However the learnable and unlearnable error signals should...
This paper reports on the design and characterization of a low phase noise MEMS oscillator with ultra-low polarization voltage. An innovative oscillation circuitry is also proposed by a high gain-bandwidth, low-power TIVA (trans-impedance voltage amplifier) which is composed of two stages: the I-to-V stage and voltage gain stage. The TIVA is fabricated using 1P6M 0.18 μm CMOS technology and has been...
Two different lengths of open-loop rectangle-ring resonators were parallelly positioned at two sides of input/output microstrip lines with the same coupling gap and length. The longer open-loop rectangle-ring was designed to resonate at 1.23 GHz and 2.31 GHz. The shorter open-loop rectangle-ring was designed to resonant at 2.52 GHz to improve the bandwidth of 2.4 GHz band. The proposed filter revealed...
In this paper, we propose an interference detectable adaptive notch filter (ANF) for GPS receivers. The proposed ANF can estimate the existence of continuous wave interference (CWI) and its power, by exploiting the statistic value within an adaptive second-order infinite impulse response (IIR) filter. Moreover, our ANF is modulized, which allows more modules can be included to deal with multiple CWIs...
A adaptive frequency selective surface (FSS) superstrate for the directive patch antenna is proposed in this paper. The FSS superstrate is composed of periodic strips and cut wires loaded with tunable lumped-element capacitances. Based on the investigation of the transmission characteristic for its unit cell, it is found that the varying capacitance values can result in the shift of the transmission...
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