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A four-chip custom VLSI implementation of a 32-b computer comprised of a CPU, a secondary cache controller, a floating-point accelerator, and a clock generator is described. It operates at a cycle time of 28 ns and is compatible with an existing computer architecture. The chip set is fabricated in a 1.5- mu m n-well, double-layer-metal CMOS process and includes over 650000 transistors. The CPU is...
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