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With the increasing complexity of electronic circuits and to meet the demand of high performance, the design and optimization of electronic circuits need to be automated with high degree of reliability and accuracy. In order to optimize hardware requirements of digital combinational circuits, evolutionary and innovative techniques need to be enforced at various levels such as at gate level and device...
We present a detailed study of back bias (Vbb) impact on UTBB devices with a gate length (LG) of 25nm and BOX thicknesses (TBOX) of 25nm and 10nm, respectively. It is reported for the first time that the Vt is modulated by Vbb across a wide temperature range, from −40°C to 125°C. The device electrostatics and reliability, under various Vbb are investigated. The short channel effect (SCE) is well maintained...
The last decade has seen explosive growth in the development of mobile applications. This has increased the demand on the wireless communication services. The capability to achieve wireless access anywhere, anytime, and anyplace has become common expectation as it provides significant flexibility and freedom in mobility. But to achieve global mobility in heterogeneous networks for any mobile device...
In this paper an extension of the Sakurai and Newton's Nth power law model, namely Extended-Sakurai-Newton Model, is proposed. The proposed model (henceforth referred to as the ESN model) preserves the simplicity and accuracy of the Sakurai Newton model for the estimation of drain current in deep submicron CMOS devices and extends it for varying device widths. Although the Modified Sakurai-Newton...
The demand for the wireless Internet requiring broadband is expected to increase in a dramatic way due to popularity of tri player applications including voice, video, and data transmission. The existing wireless technologies UMTS, WiFi, WiMax, may not satisfy the customer requirements, for many reasons including availability, coverage, cost and most importantly mobility. Each technologies has it...
We present SynECO, a framework to achieve predictable timing improvement via incremental resynthesis and replacement. We target timing-critical paths postplacement and resynthesize and replace promising gates. We show since the wire delays are the non-negligible contributors to a critical-path delay, it is crucial to accurately estimate them to make a predictable synthesis modification. For this purpose,...
Maintaining seamless end-to-end connectivity is a challenge in multi-hop networks because of frequent topology changes due to user mobility. In this article, we propose a predictive handoff scheme to minimize the packet loss during handoff and also the number of handoffs in a multi-hop heterogeneous wireless network. A new approach is proposed to estimate the connection stability of a node and initiate...
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