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PicoBlaze is an 8-bit soft core microprocessor developed by Xilinx that can be synthesized in some FPGA families. This paper presents a set of peripherals that have been developed to interface with PicoBlaze: VGA control, serial communication, PS/2 keyboard port and LCD control. To demonstrate its capabilities, the system has been implemented in a FPGA board and some typical control and monitoring...
Delay testing is crucial for most microprocessors. Software-based self-test (SBST) methodologies are appealing, but devising effective test programs addressing the true functionally testable paths and assessing their actual coverage are complex tasks. In this paper, we propose a deterministic methodology, based on the analysis of the processor instruction set architecture, for determining rules arbitrating...
Within the design arena of modern devices based on cutting-edge processor cores, such as the OpenSPARC T2, the availability of effective verification, validation and test methodologies able to take advantage of high level descriptions of processor cores represents a particular advantage, since they can dramatically reduce the overall time for design and manufacturing, and improve yield and quality...
Software-based self-test (SBST) is increasingly used for testing processor cores embedded in SoCs, mainly because it allows at-speed, low-cost testing, while requiring limited (if any) hardware modifications to the original design. However, the method requires effective techniques for generating suitable test programs and for monitoring the results. In the case of processor core testing, a particularly...
This paper presents an innovative approach for the generation of functional programs to test path- delay faults within microprocessors. The proposed method takes advantage of both the gate- and RT-level description of the processor. The former is used to build binary decision diagrams (BDDs) for deriving fault excitation conditions; the latter is exploited for the automatic generation of test programs...
Testing SoC is a challenging task, especially when addressing complex and high- frequency devices. Among the different techniques that can be exploited, software-based selft-test (SBST) emerged as an effective solution, due some advantages it provides (no HW changes, at- speed testing, re-usability); however, the method requires effective techniques for generating suitable test programs. In this paper...
Research community has not investigated as deeply as necessary the test generation problem of peripheral modules inside a system-on-a-chip (SoC), yet. Testing process for a peripheral core requires two distinct but highly correlated tasks: peripheral configuration and peripheral exercising. The configuration task is usually performed by an assembly program executed by the microprocessor within the...
Delay testing is mandatory for guaranteeing the correct behavior of today's high-performance microprocessors. Several methodologies have been proposed to tackle this issue resorting to additional hardware or to software self test techniques. Software techniques are particularly promising as they resort to Assembly programs in normal mode of operation, without requiring circuit modifications; however,...
The ever increasing usage of microprocessor devices is sustained by a high volume production that in turn requires a high production yield, backed by a controlled process. Fault diagnosis is an integral part of the industrial effort towards these goals. This paper presents a new methodology that significantly improves over a previous work. The goal is construction of cost-effective programs sets for...
The ever increasing usage of microprocessor devices is sustained by a high volume production that in turn requires a high production yield, backed by a controlled process. Fault diagnosis is an integral part of the industrial effort towards these goals. This paper presents a novel cost-effective approach to the construction of diagnostic software-based test sets for microprocessors. The methodology...
In this paper, we present the VLSI realization of a configurable device called POEtic. This device encompasses a custom 32-bit RISC microprocessor and a custom FPGA with dynamic routing capabilities and also with dynamic and self-configuration abilities. The POEtic device can be used as a standalone general-purpose prototyping platform with dynamic reconfiguration capabilities. Additionally, the system...
Microprocessor technology is increasingly used for many applications; the large market volumes call for cost containment in the production phase. Process yield for processor production is, however, far from ideal. To increase it fault diagnosis is an important means, since it can allow both process characterization and product repair by the usage of backup resources. This paper presents a novel methodology...
In the past performance counters have been available to top-end microprocessors as hardware luxuries for profiling critical applications. Today, on the contrary', several desktop microprocessors contain hardware support for monitoring performance events. This paper proposes a new approach to automatic test program generation that exploits such hardware to monitor specific micro-architectural events...
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