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This paper presents an analogue integrated circuit implementation of a cortical neuron model. The VLSI chip prototype has been implemented in a 0.35 mum CMOS technology. The single neuron cell has a compact layout and very low energy consumption, in the range of 9 pJ per spike. Experimental results demonstrate the capability of the circuit to generate a realistic spike shape and a variety of spiking...
The paper presents a silicon neuron circuit that mimics the behaviour of known classes of biological neurons. The circuit has been designed in a 0.35 mum CMOS technology. The firing patterns of basic cell classes: regular spiking (RS), fast spiking (FS), chattering (CH) and intrinsic bursting (IB) are obtained with a simple adjustment of two biasing voltages. The simulations reveal the potential of...
This paper presents a novel analogue VLSI circuitry that reproduces spiking and bursting firing patterns of cortical neurons, using only 14 MOSFETs. The circuit provides a basic building block for the development of neuromorphic architectures. It enables implementation of many neurons in a single silicon chip while exhibiting flexibility in obtaining different types of adaptive and oscillatory neuron...
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