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This paper presents a new fully automated design methodology for analog circuit synthesis in submicron technology. It requires circuit topology and desired circuit performance as input and it produces not only the sized netlist but also the layout of the sized components. Today's submicron technology accompanies appreciable process variation. In conventional equation based circuit sizing technique...
This paper presents a new approach for generating saturation constraints and DC performance expressions for analog integrated circuits. It also proposes a generalized method to develop AC performance expressions of the same in posynomial form. The developed posynomial expressions can be used for well established geometric programming (GP) based sizing optimization. The equation generation method takes...
In this paper a novel method for fast transient low power and high dropout DC-DC converter for embedded applications has been proposed. Fast transient is achieved by introducing one fast current control feedback loop with relatively slow current control feedback loop with a small Miller capacitor. Inner feedback loop is made faster by utilizing proposed push-pull structure of linear regulator. To...
This paper presents a method for optimal sizing of CMOS low drop out regulator circuits. The technique relies on the observation that many of the performance metrics of a LDO regulator can be approximated as posynomial functions of design variables. This allows the design problem to be cast as a geometric program. Geometric program is particularly attractive as the tool for optimization as --1)it...
In this paper we are addressing power efficiency and output ripple of an embedded switched-capacitor based DC/DC Buck Converters. Here we propose to use current pump based switched-capacitor circuit in buck converter. The current pump circuit limits transition current of the switched-capacitors and hence, improves power efficiency and reduces output ripple. We have also proposed an equivalent macro...
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