The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
A high-power and a low-power fully integrated true-time-delay (TTD) phased-array receiver front-end have been developed for Ka-band applications using a 0.25- SiGe:C BiCMOS technology. The high-power front-end, consisting of a high-power low-noise amplifier (LNA) and an active TTD phase shifter, achieves gain and a noise figure (NF) below 3.1...
A fully integrated passive True Time Delay (TTD) phase shifter with 32ps continuous changing delay time has been realized in a 0.25μm SiGe:C BiCMOS technology. A new TTD architecture is proposed based on broadband matching technique, resulting in less than 4% delay variation over a very large, 10–50GHz frequency span, meanwhile maintaining an input return loss better than 10dB. The measured input...
A fully integrated 2-channel Ka-band True Time Delay (TTD) phase shifter with 12ps continuous changing delay time has been realized in a 0.25μm SiGe:C BiCMOS technology. A delay variation cancellation technique is proposed, resulting in less than 0.8ps delay variation over a 20–40GHz frequency span, meanwhile maintaining a constant input impedance. In the high (low) power mode, the measured input...
A 30GHz Ka-band low noise amplifier (LNA) has been realized in a 0.25µm SiGe:C BiCMOS technology. A noise figure (NF) of 1.8–2.2 dB has been measured at 26–32 GHz. The achieved 3dB-power bandwidth is larger than 7GHz, with a peak gain of 12.4dB at 29.2GHz. The input 1 dB compression point (ICP1dB) is −11dBm and input IP3 is −1.3dBm at 30GHz for a total power consumption of 98mW. The chip area including...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.