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This paper presents design and verification of a 10Gbps in-line Network Security Processor (NSP) with a single 32-bit embedded CPU. This NSP is designed to process the IPSec protocol at line speed for the 10Gbps Ethernet. 10Gbps SerDes, IPSec protocol processing module, database query module, and a CPU are designed to be integrated on one chip to form a System on Chip (SOC). The CPU used is OR1200,...
A configurable IPSec processor for a high performance in-line network security processor that integrates two embedded 32-bit CPU cores, and an IPSec protocol processor on a SoC is presented. The IPSec processor can implement the transport/tunnel mode AH and ESP protocol of the IPSec, and support AES-128/192/256, HMAC-SHA-1 algorithm. The number of AH, ESP, AES, HMAC-SHA-1 IP-cores in the design can...
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