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A high-efficiency scheme based on both time division multiplexing (TDM) and parallel processing of FPGA is proposed in this paper to address the problem of high scanning rate in high-speed measurements with UWB array GPR. The merit of this new scheme is that all trigger signals of all the channels can be delayed in a controllable step through the same delay chip at different times. Each channel of...
Fiber array optical systems that are used for free-space optical communications and phased laser beam projection applications depend on fast, closed-loop adaptive control to efficiently compensate for optical distortion caused by atmospheric turbulence. Current off-the-shelf systems are limited in performance, fiber array control channels, and flexibility. In this research project, we built a scalable...
Emerging devices open the way to build nanoscale logic cells, dedicated to high-density reconfigurable computation. Nevertheless, in an architectural context, fine-grain logic cells integration is limited by traditional interconnection scheme and associated overload. This paper describes an interconnection scheme, based on static and incomplete interconnection topologies. We also propose a method...
In this paper, a box-constrained MIMO detector is considered that allows simple FPGA implementation and provides improvement in the detection performance compared to the MMSE detector. The box-constrained detector is implemented using dichotomous coordinate descent iterations. We investigate the design throughput against the BER performance and the design complexity in terms of the number of logic...
The FPGA implementation of a new complex division algorithm is described. It is based on the dichotomous co-ordinate descent method and requires only bit-shift and addition operations. Consequently, the footprint of the new complex division core is remarkably small.
Proposed is a low complexity dynamically regularised recursive least squares (RLS) adaptive filtering algorithm based on dichotomous co-ordinate descent iterations. The complexity of the proposed algorithm is reduced to 𝒪(N2), N being the filter length, compared to 𝒪(N3) for a directly regularised RLS algorithm. Field programmable gate array implementation shows that the proposed...
Correlation based methods are gaining attention in the biometric field due to the extremely good results achieved for pattern matching recognition in authentication and verification processes. In particular, a high matching accuracy can be obtained with these methods in the fingerprint field. However, they cannot be used in many applications because of the large computational effort required. On the...
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