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We demonstrate a self-aligned process for forming fully- depleted SOI MOSFETs with deposited metal-silicon S/D junctions and gate lengths as short as 75 nm. For the devices presented here, the metal S/D regions were formed of deposited Al which is self-aligned to the gate and STI edges, with Si3N4 junction passivation to suppress Fermi-level pinning. Inverse modeling of the electrical data indicates...
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