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For the first time, the interest of a new SiCO low-k spacer material deposited at 400°C is evaluated in the perspective of a 3D VLSI integration. The benefits of SiCO low-k (4.5 vs 7 for SiN) value is preserved throughout the whole integration and translates into a 5% decrease for both effective capacitance and delay of FO3 Ring Oscillators in a 14FDSOI technology. In addition, a NMOS breakdown voltage...
A performance upgrade of our 14nm FDSOI technology is reported in this paper. Compared to our previous 14nm FDSOI assessment, a −17% delay at the same leakage is demonstrated. We show that the AC performance of 28nm FDSOI at a 0.9V supply voltage is reached at 0.6V in 14nm FDSOI technology. This corresponds to a 50% increase in frequency at the same dynamic power, or a 65% power saving at the same...
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