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Frequent itemset mining is a fundamental step in analysis of big data where correlation among the raw data in deemed necessary. In modern era the amount of data available for processing has grown exponentially, making it a stepper task for mining algorithms to provide solution in a timely manner. The software implementations are normally not efficient in handling such datasets thus focus on parallel...
The k-means clustering is one of the widely used algorithms in Data Mining and Machine Learning domains due to the simplicity, efficiency and scalability involved. The algorithm allocates N data-points or samples to k-clusters employing the minimum distances from respective cluster centroids. Distance calculation is intrinsically a computationally intensive task which is usually accelerated by using...
The work by Uthayanath Suthakar was supported by a Brunel University London College of Engineering, Design and Physical Sciences Thomas Gerald Gray postgraduate research scholarship. Uthayanath Suthakar also acknowledges the IEEE NSS-MIC for financial support in the form of a Trainee Grant.
Vehicular adhoc networks come out to be a promising solution for ensuring traffic and road safety on highways. However this area induces communication challenges such as topology dynamics, and connectivity losses. Today's Vanet demand a sound planning to make architectural level decisions. Integrating Vanet with emerging Software defined Networking brings ground-breaking networking innovation. Recent...
Avatar is a system that leverages cloud resources to support fast, scalable, reliable, and energy efficient distributed computing over mobile devices. An avatar is a per-user software entity in the cloud that runs apps on behalf of the user's mobile devices. The avatars are instantiated as virtual machines in the cloud that run the same operating system with the mobile devices. In this way, avatars...
Increasingly sophisticated algorithms are now being used in wireless communication systems to achieve higher data rates, improved spectrum utilization and lower power transmission. Owing to the ever increasing speed requirements, field programmable gate arrays (FPGAs) have become an attractive option for communication systems due to the flexibility and computational power they offer. In this paper...
Multiprocessor system on chip (SoC) contains hundreds of cores on a chip that require high speed interconnections for fast data communication between the cores. With an increased number of cores, an on-chip bus or a multi-layer bus architecture is the bottleneck for SoC. In contrast, Network-on-chip (NoC) mitigates the flaws of the SoC technology by introducing high scalability, improved communication...
In this demo paper we present Orange, a system prototype for objective-aware range query refinement. Orange essentially refines a range query to meet a pre-specified cardinality constraint while taking into account the (dis)similarity between the initial query and its corresponding refined version. To achieve this goal, Orange employes the novel scheme SAQR for efficient similarity-aware query refinement...
From last decade, the tremendous growth of cloud computing and advancement in wireless communication technology has increased the usage of portable devices and facilitated mobile users to take advantage of mobile cloud services. Conversely, the high communication costs and inferior performance of mobile Internet over wide-area cellular network access obstruct the mobile devices' capabilities in resource...
With latest advancements in architecture, reprogram ability and availability of abundant on-chip resources, FPGAs (Field Programmable Gate Array) are used as hardware accelerators to speedup computationally intensive tasks with inherent parallelism. However non-availability of standard MATLAB and C/C++ computation routines and communication interface for general purpose programming restricted researchers...
This paper proposes novel design methodologies for generating feed forward and recursive architectures for optimal mapping on Field Programmable Gate Arrays (FPGAs). The new methodology keeps in perspective the architecture of FPGA, structural design of logic blocks, their interconnectivity and available special purpose embedded blocks during filter transformation. Higher throughput is achieved through...
Organic photovoltaic devices (OPVs) are realizing power conversion efficiencies that are of interest for commercial production. However, cell efficiencies are poor to modest when compared to their more traditional silicon and other inorganic based counterparts. Apart from material breakthroughs, there is immense need to therefore engineer novel approaches to improve OPV cell performance. In this work,...
MEMOCODE Design Contest challenged teams to implement the architecture for a unique type of Deep Packet Inspector called CANSCID. This paper describes this unique problem statement, and the motivation for choosing it. This paper is followed by short descriptions prepared by individual teams detailing their particular approach to solving the problem.
This paper presents a novel lossless data compression device that extends enterprise network to branch offices by integrating multiple communication technologies. The presented device incorporates Gigabit Ethernet, STM1/STM4/STM16 interfaces for WAN connectivity, fiber channel interfaces for storage area network and 10G Ethernet interface for enterprise network connectivity. The device implements...
Software routers based on personal computer (PC) architectures are receiving increasing attention in the research community. However, a router based on a single PC suffers from limited bus and central processing unit (CPU) bandwidth, high memory access latency, limited scalability in terms of number of network interface cards, and lack of resilience mechanisms. Multi-stage architectures created by...
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