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Analog-to-digital conversion plays an essential role in all kinds of electronics systems, including signal processing, communications and storage. In particular, interpolated flash ADC has been widely used in high-speed systems requiring very high sampling speed. Obviously, practical ADC design is very challenging, which has been dominated by experiences and trial-and-error skills. This is true to...
A 3.1-4.8GHz LNA for lower-band UWB transceiver front-end ICs designed in a commercial 0.18μm CMOS is presented. The LNA features current reuse, resistive feedback, complete and robust full-chip ESD protection. LNA circuits with and without ESD protection are compared to minimize ESD-induced LNA performance degradation. Experiment shows a gain of 13.2dB, excellent input reflection of -13.4dB, NF of...
A digitally controlled artificial dielectric (DiCAD) differential transmission line is designed to perform agile linear phase shift over 100deg with thermometer-coded 16 step control. It also operates with a 16 gain-step VGA to enable re-configurable and direct-frequency modulation at 60 GHz with 2562 states (1.1deg angular and 0.0007 magnitude resolutions) and -31 dB static EVM for multiple PSK/QAM...
This paper reviews advances in new 3D electro-thermal modeling technique for ESD (electrostatic discharge) protection structures. New 3D ESD device modeling is critical to full-chip ESD protection circuit design synthesis, verification, optimization and prediction, especially for IC designs in sub 100 nm CMOS technologies.
A 1.2GS/s 15b DAC achieves untrimmed SFDR of -70dBc to f/sub s//4 and -63dBc to Nyquist (with 10dB better results at 500MS/s). A per-element resampling scheme and dynamic element matching achieve DNL of 2LSB. In RZ output mode, ACPR for a 20MHz band at 900MHz is 69dB. The chip uses 40GHz-f/sub T/ NPN and is implemented in 0.35 /spl mu/m CMOS.
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