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Many communications embedded systems implement decimation filters. In particular, base-band stage in multistandard receivers is composed of cascade of decimation filters performing channel selection. The number of used filter and the kind of these filters can have a significant impact on the computation complexity and power consumption of multistandard receivers. In This work we present FIR filters'...
The idea behind this work is to extract from a large number of FIR filter syntheses several curves that estimate the area and power consumption. The aim is to help filter designer to make the right choice regarding decimation factor versus area and power consumption. The performed experiences show that for a given filter order, the choice of the decimation factor has a deep impact on the area and...
This work presents a low-power multistandard decimation and channel selection filter architecture. The filter is suitable after an over-sampling sigma-delta converter and performs decimation in two stages. The first stage is a modified structure of the cascade of integrators-combs (CIC) filter and allows reducing sampling rate downto only the double of the Nyquist frequency. The second stage composed...
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