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The Triple Modular Redundancy (TMR) technology allows protection of the functionality of FPGAs against single event upsets (SEUs). Each logic block is implemented three times with a 2-out-of-3 voter at the output. Thus, the correct logical value is available even if there is an upset bit in one location. We applied TMR to the configuration code of a Virtex-II-2000 FPGA, which serves as the on-chamber...
The ATLAS experiment at the Large Hadron Collider (LHC) at CERN is currently being assembled to be ready to take first data in 2008. Its muon spectrometer is designed to achieve a momentum resolution of better than 10% up to transverse muon momenta of 1 TeV. The spectrometer consists of one barrel and two endcap superconducting air-core toroid magnets instrumented with three layers of precision drift...
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