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Endurance considerations induced by the degradation of top and bottom oxides are proposed for a SONOS memory. First, a correlation is found between the widespread C-V curves induced by interface generation and cycling numbers (cyc. #). Unlike VFB (accumulation region), VT (inversion region) shows a much severe shift. Interface state (Nit) is identified as a key factor even when a 2 nm bottom oxide...
Erase characteristics of a SONOS-based structure are emulated not only for n+-poly and p+-poly gates but also for TaN-gate+Al2O3 combination. By incorporating our previous studies, performances including program, erase, and read disturb can be reviewed for both SONOS and TANOS devices. Unsurprisingly, it is hard to satisfy all requirements by using a SONOS device. In a TANOS device, an optimal bottom...
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