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This paper describes the development of a 3-phase line-interactive DVR with a new sag detection algorithm. The developed detection algorithm has a hybrid structure composed of an instantaneous detector and the RMS-variation detectors. The source voltage passes through the sliding-window DFT and RMS calculator, and the instantaneous sag detection part. If instantaneous sag is detected, the RMS variation...
A single-stage stacked-FET power amplifier (PA) is demonstrated using a 0.28-mum silicon-on-insulator (SOI) CMOS technology. To overcome the low breakdown voltage limit of MOSFETs, a stacked-FET structure is employed, where four transistors are connected in series so that their output voltage swings are added in phase. The stacked-FET PA has been designed to withstand up to 9 V of supply voltage before...
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