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A simple and cost-effective single metal gate scheme was successfully demonstrated to form gate-all-around (GAA) nanowire FETs with optimized dual VT for low power CMOS applications. FUSI gate-induced stress effects were shown to be of great relevance to device performance. At an IOff of 20 pA/mum, superior IOn of 1180 and 405 muA/mum were obtained for NFETs and PFETs at a VDD of 1.2 V.
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