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Novel RHBD techniques are described that utilize charge sharing to mitigate voltage transients due to single event strikes in a folded cascode operational amplifier. These techniques are verified using simulations in a 180-nm CMOS process.
Floating-body and body-tied inverter circuits were implemented in MIT Lincoln-Lab's 3-dimensional SOI 150 nm process to characterize the technology for single-event effects. The circuits were tested with heavy-ions and single-event transients were measured for body-tied and floating-body inverters across all tiers. These experimental results show that for floating-body and body-tied circuits that...
Reliability-aware logic synthesis can be used to mitigate a circuit's response to radiation-induced soft errors. This paper analyzes the impact of using reliability-aware logic synthesis to reduce both the pulse width and the drain area of a circuit. Using our targeted cell library, several benchmark circuits were analyzed to identify equivalent, less-vulnerable implementations while minimizing penalties...
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