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We describe the design of two three dimensional arithmetic units (a 3D adder and a 3D multiplier) that are implemented using through-silicon-via 3D stacking technology. Compared to their 2D counterparts, our 3D adder incurs 10.6-34.3% less delay and 11.0-46.1% less energy when the width increases from 12-bit to 72-bit; the 32 times 32 3D multiplier incurs 14.4% less delay and 6.8% less energy, according...
Mitigating the circuit aging effect in digital circuits has become a very important concern for current and future technology nodes. Negative Bias Temperature Instability (NBTI) is one of the most important circuit aging mechanisms, which can incur timing errors. Flip-flops play a vital role as storage elements in pipelined architectures and are prone to effects of aging. NBTI increases the transistor...
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