The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
In this paper, we present simulation and measurement results of single-ended and differential vertical interconnections realized using the thin-film redistribution layer (RDL) and through encapsulant vias (TEVs) of the embedded wafer level ball grid array (eWLB) package. We demonstrate that the fan-out area of the eWLB can be used advantageous for the design of passive devices using TEV structures...
We present high frequency electrical characterization of 3D interconnection structures. The 3D interconnections are realized using on-chip metallization and through silicon vias (TSVs). We analyze and compare two types of 3D transitions. The first transition is made of TSVs that form a 3D coplanar waveguide. The second transition is realized using a 3 x 5 array of parallel connected TSVs. We use a...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.