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In the system-level design of MPSoCs (multi-processor system-on-a-chips), system designers start from describing functionalities of the system as processes and channels, and then decide mapping of them to various processing elements (PEs) including CPUs and dedicated hardware modules. A mapping decision is evaluated by simulation or FPGA-based prototyping. Designers iterate mapping and evaluation...
This paper presents a case study on designing an MPEG4 decoder system using our system-level design toolkit named system builder. We start with a sequential specification of the MPEG4 decoder behavior and generate an FPGA implementation. In order to improve the performance, we refine the behavioral description based on the analysis result obtained by a profiler. Finally, we achieve over 15 fps performance...
We study a low-density parity-check (LDPC) coded CDMA system. The performance of the system with the optimum joint decoding is analytically evaluated by the spectral efficiency, together with numerical evaluation.
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