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This paper presents bootloader and debugger architectures that are designed for an NoC-based Multiprocessor System On-Chip (MPSoC). An MPSoC demands scalable bootloader and debugger architectures, especially with the increasing of the number of the processor cores. The proposed bootloader and debugger designs utilize the NoC interconnect network to distribute data to and from the cores. With this...
Sofware-Defined Radio (SDR) has been proposed as a solution for a single device to overcome various and changing radio standards. It allows wide range of computational device, such as personal computer processor and Multi-Processor System-on-Chip (MPSoC) to function as radio baseband processor. Number of works of SDR implementation on MPSoC has been done, variously differing according to underlying...
JavaScript has become a general-purpose programming environment that enables complex, media-rich web applications. An increasing number of JavaScript programs are parallelized to run efficiently on today's multicore CPUs, which are capable of dynamic core scaling (DCS) and voltage/frequency scaling (DVFS). However, significant power savings are still left on the table since an operating point (in...
Autonomic management capabilities of the Future Internet can be provided through a recently proposed service architecture called NetServ. It consists of the interconnection of programmable nodes which enable dynamic deployment and execution of network and application services. This paper shows how this architecture can be further improved by introducing the OpenFlow architecture and implementing the...
There has always been a strong relationship between computer applications and computer architectures. Advances in computer architecture enable new usage models; new usage models challenge new architectures. For many decades, the interplays between applications and architectures have resulted in significant progress in the computer technologies. Recently, the computer industry adopts the multi/many-core...
A platform that supported sequential consistency (SC) for all codes - not only the well-synchronized ones - would simplify the task of programmers. Recently, several hardware architectures that support high-performance SC by committing groups of instructions at a time have been proposed. However, for a platform to support SC, it is insufficient that the hardware does; the compiler has to support SC...
We continue to investigate the use of trust management techniques to specify dynamic policies in complex integrated service-oriented networks. For this work, we use the DoD GIG's service-oriented architecture as a focal point. In this research's initial phase, we are developing prototype dynamic trust management policy services for a service-oriented architecture. In our research's next phase, we...
We present this letter on the combining effect of tunnel-oxide degradation and narrow width effect on the data retention characteristics of NAND flash memory cells. Due to severe boron segregation in shallow-trench isolation (STI) corner, the cell transistor suffers from intense VTH shift on STI corner in data retention mode. Independent of enhancing the tunnel-oxide quality, the data retention characteristics...
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