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In today's super system scenario the computation effectiveness is obtained from multiple processors which are connected to themselves and to their memory modules through multistage interconnection networks (MIN) So performability of these multistage interconnection networks (MIN) Plays vital role in effective and efficient processing of these super systems. In this paper performance of these MIN namely...
This paper proposes a new dimension order routing algorithm for Mesh-of-Tree based Network-on-Chip design. It simplifies the router design as well. It results in significant saving in the energy consumed by the network. For uniform traffic, the saving is as high as 63%. It offers the flexibility of designing routers of different sizes for mapping of applications.
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address these issues, a more fundamental change to the fabric of multicore systems is necessary to seamlessly combat these challenges. Towards this end, this paper proposes CoreGenesis, a dynamically adaptive multiprocessor fabric that...
This paper present a new dimension-oriented routing algorithm for Mesh-of-tree (MoT) based Network-on-Chip (NoC) architecture. The addressing scheme is considerably simplified that enables us to reduce the minimum flit-size to 16-bits, compared to 32-bits in the previously reported works. The same level of throughput and average latency could be achieved with a 43.86% reduction in area and 43% reduction...
Necromancer, a robust and heterogeneous core coupling execution scheme, exploits a functionally dead core to improve system throughput by supplying hints regarding high-level program behavior. Necromancer partitions a chip multiprocessor system's cores into multiple groups, each of which shares a lightweight core that can be substantially accelerated using execution hints from the faulty core.
The actual traffic data collected on various applications specific on-chip networks exposed that the network traffic is self-similar in nature. In this work, modeling of self-similar traffic by aggregation of a large number of on-off Pareto sources has been discussed. We have developed a cycle accurate network simulator for evaluating the performance of wormhole router based network by varying locality...
Multiple-input multiple-output (MIMO) is an existing technique that can significantly increase throughput of the system by employing multiple antennas at the transmitter and the receiver. Realizing maximum benefit from this technique requires computationally intensive detectors which poses significant challenges to receiver design. Furthermore, a flexible detector or multiple detectors are needed...
We propose a novel framework to critically analyze a given MAC protocol for wireless ad hoc networks with respect to its correctness criteria and performance metrics. The framework is composed of wanted state generation and test scenario generation algorithms. The wanted state generation algorithm generates a set of conditions that meet our study objective. The test generation algorithm then generates...
Previously, we have developed a framework to perform systematic analysis of CSMA/CA based wireless MAC protocols. The framework first identifies protocol states that meet our study objective of minimizing a given performance metric. It then applies search techniques and heuristics to construct sequences of protocol events in a given topology that satisfy our objective. In this paper, we demonstrate...
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