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Given the recent difficulty in continuing the classic CMOS manufacturing density and power scaling curves, also known as Moore's Law and Dennard Scaling, respectively, we find that modern complex system architectures are increasingly relying upon accelerators in order to optimize the placement of specific computational workloads. In addition, large-scale computing infrastructures utilized in HPC,...
In this paper we present a router that combines the circuit switching and packet switching in order to efficiently and separately handle the guaranteed-service and best-effort traffics. The main innovation consists in proposing a novel connection configuration mechanism, in which the source node first sends the connection request to manager via a pre-reserved request path, and the manager sends back...
The TDM-based NoC is an attractive technique for providing QoS in on-chip communication. However, fast, dynamic and robust path and slot allocation is still a challenging task particularly for networks with high connection request rates. A centralized resource allocation approach is presented in this paper, which enables multipath multislot allocation in parallelism at run-time. With full structured...
This paper presents a heterogeneous database hardware accelerator MPSoC manufactured in 28 nm SLP CMOS. The 18 mm2 chip integrates a runtime task scheduling unit for energy-efficient query processing and hierarchical power management supported by an ultra-fast dynamic voltage and frequency scaling. Four processing elements, connected by a star-mesh network-on-chip, are accelerated by an instruction...
Recent system on chip (SoC) techniques have permitted the continued scaling of core densities at a rate sufficient to track Moore's Law. However, this continued increase in transistor density has warranted new hardware features in order to sufficiently scale the degree of on-chip concurrency. Features such as complex multi-level caches, hierarchical core configurations and hardware-assisted threading...
The paper reveals a trend of substituting PC with thin clients. Features and application demand of thin clients are investigated. A comprehensive evaluation system is established, which takes factors including hardware, remote concentrated management system, peripheral compatibility, performance, reliability, virtualization platform compatibility and energy consumption into account. Furthermore, we...
The computing paradigm of "HPC in the Cloud" has gained a surging interest in recent years, due to its merits of cost-efficiency, flexibility, and scalability. Cloud is designed on top of distributed file systems such as Google file system (GFS). The capability of running HPC applications on top of data-intensive file systems is a critical catalyst in promoting Clouds for HPC. However, the...
According to the different time constraints for simulation tasks, a multi-level distributed real-time simulation platform was proposed, on which hardware layer was mainly introduced to solve rigorous real-time tasks. The distributed simulation framework under centralized management was given. Then, FPGA and DSP hardware boards were well designed. Especially, reflective memory network and bottom hardware...
Shared-nothing and shared-disk are the two most common storage architectures of parallel databases in the past two decades. Both two types of systems have their own merits for different applications. However, there are no much efforts in investigating the integration of these two architectures and exploiting their merits together. In this paper, we propose a novel hybrid storage architecture for large-scale...
While computing speed continues increasing rapidly, data-access technology is lagging behind. Data-access delay, not the processor speed, becomes the leading performance bottleneck of high-end/high-performance computing. Prefetching is an effective solution to masking the gap between computing speed and data-access speed. Existing works of prefetching, however, are very conservative in general, due...
Vitual machine (VM) technology encapsulates shared computing resources into secure, stable, isolated and customizable private computing environments. While service-oriented computing becomes more and more a norm of computing, VM becomes a must-have common structure. However, creating and customizing a VM system on different hardware/software environments to meet versatile demands is a state-of-the-art...
The paper puts forward a variable threshold value artificial neuron structure. The neural function between the output and input can be accurately trained by increasing the density of threshold value. Combined with characteristic of distributed control systems, a long-distance intelligent marking method is proposed and is applied to carry out the process of training threshold value and weight coefficient...
A design of three-axes high speed engraving machine control system based on embedded system was proposed in this paper. ARM (advanced risk machines) and FPGA (field programmable gate array) were considered as the corn in hardware, as well as the real-time multitask operating system muc/OS-II as platform in software system. One new solution for high speed engraving machine control system was provided,...
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