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A K-band low-noise amplifier (LNA) is designed and fabricated in a standard 0.18 μm CMOS technology. A design method of CMOS LNA is used to render the optimum source resistance (Ropt) close to 50 Ω and Zin=Zopt* by using small devices and small bias currents. This LNA chip achieves a peak gain of 13.5 dB and a noise figure of 4.7 dB at 24 GHz. The supply voltage and current are 1 V and 8.3 mA, respectively...
A conventional level converter, named the dual cascode voltage switch (DCVS), interposed between gates operating on different supply voltages in a CMOS logic circuit, to prevent the short-circuit current and reduce power consumption. Although the level converter blocks the short-circuit current, it consumes relatively large dynamic power when it carries out a switching operation. If the CMOS logic...
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