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We propose an efficient multiplexed sensing system for detecting bladder cancer biomarkers without invasiveness, labeling, and high cost using a silicon-based dual microring resonator biosensor. The dual microring biosensor consists of a sensing microring and an electrical tracing microring. The working principle of the sensor is that a resonance wavelength shift of sensing ring is induced by the...
We demonstrate a volatile organic compounds (VOC) gas detection using silicon based microring resonator devices. Polymer is chemically attached to sidewall of silicon waveguide and microring as a cladding layer. Absorption of VOC gases into the polymer film induces a resonance wavelength shift. A detection limit of 10 part per million (ppm) for both toluene and acetone has been achieved.
A front-end preamplifier consisted of transimpe-dace amplifier (TIA) core, single-to-differential converter (STDC) and output buffer(OB) is proposed in this paper. The goal is to realize a low cost and high performance preamplifier to be used in the optical receiver modules based on the standard 0.5um complementary metal oxide semiconductor (CMOS) process. The regulated cascade (RGC) input structure...
This paper presents a low operation voltage ultrawideband power detector IC for microwave and millimeter-wave applications. The power detector circuit includes an nMOS transistor differential pair with a resistive feedback. The power detector IC was designed and fabricated using TSMC 130 nm CMOS technology. The detector IC exhibits an operation frequency from 100 MHz to 40 GHz at an operation voltage...
In this paper, a post-linearization technique of cascode CMOS power amplifier is presented. The proposed method adopts two cascode FET, one operates in class AB mode and the other works near class B mode, which absorbs the nonlinear current of third-order intermodulation distortion (IMD). The proposed method is investigated for 5.8 GHz Dedicated Short Range Communication (DSRC) applications, and fabricated...
A compact broadband balun on a silicon substrate is proposed for millimeter wave applications. By utilizing the stacked coupling and compensated line, it is expected that the balun exhibits an amplitude balance of less than 0.1 dB and a phase balance of less than 1° in a frequency range from 70 GHz to 100 GHz. The minimum insertion loss is 0.9 dB in the operational frequency band. The balun size occupies...
This paper presents a novel variable inductor consisting of a triple transformer, pMOSFET switches and a level shift circuit in 0.13 μm CMOS technology. The structure of the variable inductor is designed and analyzed by using Ansoft HFSS. The inductance varies from 0.678 nH to 1.055 nH with changing a control voltage from 0 to 1.5 V. The quality factor of the variable inductor is around 7 at 3.4 GHz.
A broadband balanced frequency doubler has been fabricated in 0.25-??m SOI SiGe BiCMOS technology to operate from 22 GHz to 30 GHz with low input drive power. Its fundamental frequency suppression of better than 30 dBc can be achieved by an internal low pass LC filter in the 22-30 GHz; moreover, maximum suppression is 47 dBc in the operation band. In addition, a pair of SLCC (series LC circuit) parallel...
A novel resonant circuit consisting of transformer-based variable inductors and MOS varactors is proposed to implement an ultra-wideband voltage-controlled-oscillator (VCO). The VCO is designed and fabricated using 0.13 mum CMOS, and fully evaluated on wafer. The VCO IC exhibits a frequency tuning range as high as 92.6 % spanning from 1.2 GHz to 3.27 GHz. The measured phase noise of -120 dBc/Hz at...
A new CMOS current reference solution is presented, by creating a new negative temperature coefficient (TC) current resulted from negative-TC voltage which is generated in the bandgap circuit whose zero-TC (ZTC) point is specially selected, and proposing low line regulation mechanism which is realized by compensating variations of source-to-gate voltage and threshold voltage versus supply voltages...
Based on conventional two-step ADC principle, an 8-bit 250MSPS modified two-step ADC is proposed to reduce power dissipation. It is realized by applying triple-stage comparison for the number reduction of comparators, substituting new reference region selecting logic (RRSL) blocks for sub-DACs and adding sample/hold (S/H) circuit to replace residue amplifier. Simulated with SMIC O.35 mum/3.3 V AMS...
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