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A near-threshold low-complexity bandgap reference (BGR) and power-on reset (POR) hybrid circuit is implemented in 65 nm CMOS, with an ultra-low supply voltage of 0.55 V and power consumption of 2.5 μW. The BGR employing amplifier offset voltage and current matching, and the POR based on offset voltage matching and loop settling feature, are proposed. The circuit-level simulation results verify that...
An octa-phase differential relaxation VCO generating both triangular and rectangular waveform outputs is designed for 8-PSK subcarrier generation in FM-UWB transceiver systems. The VCO consists of cascaded quad-phase relaxation oscillators in which the second stage oscillator provides 45° phase shifting with pseudo injection locking. The 5.2-11.8MHz octa-phase VCO implemented in 0.18μm CMOS consumes...
This paper firstly presents a CMOS voltage-controlled oscillator (VCO) which enables octa-phase triangular waveform generation. By utilizing a cascaded relaxation oscillator core followed by a pseudo injection-locked oscillator circuit, an octa-phase differential VCO with triangular waveform outputs is realized. Simulation results show that the proposed fully differential multi-phase VCO can achieve...
This paper proposes a reconfigurable, spectrally efficient 7-tap FIR pulse based UWB transmitter with the maximum pulse rate of 1.6Gpulses/s. By utilizing a Δ-Σ PLL and a DAC embedded FIR pulse generator, digitally configurable pulse generation is done with high spectral efficiency. For low power 7-tap FIR pulse generation, a 1/8-rate, 16-phase injection-locked oscillator (ILO) is designed instead...
This paper describes the architecture and circuit design of a low data rate FM-UWB transmitter. A Δ-Σ fractional-N PLL with a multi-phase relaxation oscillator is designed to enable sub-carrier modulation with reduced quantization noise. The triangular waveform output of the relaxation oscillator directly modulates an LC VCO to have the UWB-compliant spectrum. The center frequency...
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