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The proposed resistance-locked loop (RLL) can achieve high PSRR of 16 dB digital low dropout (DLDO) regulator without consuming much power which is the drawback in prior arts. Even at light loads, the RLL can be shut down for power saving. Furthermore, the duty compensator ensures DLDO stability under different duty ratio of supply voltage. The operation voltage of proposed DLDO can be down to 0...
Power factor correction (PFC) can shape the input current of off-line power supplies to be in-phase with the input AC voltage to maximize the available real power from the AC source for high power factor (PF). Boundary current mode (BCM) operation is the easiest way to get good power factor performance. However, the zero current detection in conventional PFC based on the voltage across the auxiliary...
Conventional analog low dropout regulators suffer from serious degradations in its bandwidth, PSR, and regulation performance under sub-1V operation. The proposed digital LDO with the embedded resistance-locked loop (RLL) controller fabricated in 40nm CMOS process can still correctly regulate the output voltage to 0.4 V even when the input voltage scales down to 0.6V. Besides, maximum load current...
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