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The recursive least squares algorithm (RLS) using dichotomous coordinate descent (DCD) iterations, namely, RLS-DCD, is regarded to be well suited for hardware implementation because of its small computational complexity compared to the classical RLS algorithm. While this is true, yet another important aspect that ultimately determines its applicability for real-time applications with high sample rates,...
In this paper we propose a new hardware architecture for high-speed to reduce the amount of hardware resource for CGH (computer generated hologram) calculation without sacrificing the performance. It uses the block-parallel method in calculating a CGH. After analyzing the CGH equation, we rearrange it to design hardware to fit to our purpose. The main block of the proposed hardware is common term...
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